Singapore University of Social Sciences

VLSI Design 1

Applications Open: To be confirmed

Applications Close: To be confirmed

Next Available Intake: To be confirmed

Schemes: To be confirmed

Language: English

Duration: 6 months

Fees: To be confirmed

Area of Interest: To be confirmed


Synopsis

The course takes you through the processes of implementing a silicon chip from the physical definitions through to the design and simulation of the chip’s functions. Emphasis is focused on building an understanding of integrated circuit (IC) design from the bottom up and includes important topics such as the characteristics of CMOS transistors, the CMOS processing technology, the IC design methodologies, the physical implementation of combinational and sequential logic network, and the physical routing and placement issues, which are essential to the practice of VLSI design as a system design discipline. Computer aided design (CAD) and simulation packages will also be introduced to you in the areas of digital and analog signal design and simulation. These tools are used to layout the circuit designs, to predict the circuit performance and to verify the correctness of the circuits and logic.

Level: 3
Credit Units: 5
Presentation Pattern: EVERY JULY
E-Learning: BLENDED - Learning is done MAINLY online using interactive study materials in Canvas. Students receive guidance and support from online instructors via discussion forums and emails. This is supplemented with SOME face-to-face sessions. If the course has an exam component, this will be administered on-campus.

Topics

  • An introduction to CMOS basics
  • MOS Transistor Theory
  • CMOS Processing Technology & Design Rules
  • Circuit Characterization and Performance Estimation - Delay Estimation, Logical Effort & Transistor Sizing
  • Circuit Characterization and Performance Estimation - Power Dissipation, Interconnect, Wire Engineering, Design Margin, Reliability and Scaling
  • Circuit Simulation

Learning Outcome

  • Design a logic function using CMOS design style.
  • Draw the stick diagram, transistor-level schematic for logic circuits.
  • Apply the I-V equations.
  • Examine the non-ideal I-V effects (e.g. body effect, velocity saturation, sub-threshold conduction, etc.) and other VLSI circuit design issues.
  • Analyze circuit design models and techniques, for example, RC delay model, Elmore delay model, parasitic delay model, etc.
  • Calculate transistor parameters, gate parameters, circuit parameters, IC chip power consumption, logical effort and other IC chip parameters.
  • Use interconnects in circuit design.
  • Prepare SPICE simulation netlist.
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